Andrii Bidochko

• Updated: July 19, 2026
• 6 min read

PhasorFlow: A Python Library for Unit Circle Based Computing

Direct Answer

PhasorFlow is an open‑source Python library that brings deterministic, unit‑circle based computing to conventional hardware. By encoding data as rotating phasors on the $S^1$ manifold and processing them through a compact set of unitary and non‑linear gates, the library enables lightweight, gradient‑friendly models such as Variational Phasor Circuits and a DFT‑driven Phasor Transformer.

Background: Why This Problem Is Hard

Modern AI pipelines rely heavily on high‑dimensional tensor algebra, which demands large memory footprints, floating‑point precision, and extensive GPU cycles. While quantum‑inspired approaches promise unitary evolution and norm preservation, they remain inaccessible on classical machines because they require specialized hardware or probabilistic sampling.

Existing alternatives—standard neural networks, attention mechanisms, and Fourier‑based layers—suffer from two intertwined bottlenecks:

• Parameter bloat: State‑of‑the‑art models often contain hundreds of millions of weights, inflating training cost and inference latency.
• Gradient inefficiency: Non‑linearities that break unitary constraints introduce vanishing or exploding gradients, limiting depth and stability.

These constraints matter for enterprises that need fast, deterministic inference on edge devices, and for researchers who want a clean mathematical playground that still runs on CPUs. A deterministic, norm‑preserving computation substrate that can be simulated efficiently on classical hardware would therefore fill a critical gap.

What the Researchers Propose

The authors introduce the Phasor Circuit model, a formalism that treats each data dimension as a rotating complex number (a phasor) on the unit circle. A Phasor Circuit consists of N parallel threads (the torus $\mathbb{T}^N$) and a sequence of M gates drawn from a 22‑gate toolbox. The toolbox spans:

• Standard unitary gates (e.g., phase shifts, rotations) that preserve global norm.
• Non‑linear neuromorphic gates that inject controlled amplitude drift while keeping the overall system deterministic.
• Encoding and decoding primitives that map real‑valued inputs to phasors and back.

Two concrete instantiations are highlighted:

1. Variational Phasor Circuits (VPC): A trainable stack of gates whose phase angles are optimized via gradient descent, analogous to variational quantum circuits.
2. Phasor Transformer: A token‑mixing architecture that replaces the conventional $QK^TV$ attention with a parameter‑free Discrete Fourier Transform (DFT) layer, echoing the design of FNet.

How It Works in Practice

Conceptual Workflow

Using PhasorFlow follows a three‑step pipeline:

1. Encoding: Raw features (images, time‑series, financial ticks) are projected onto the unit circle via $z = e^{i\phi}$, where $\phi$ is a learned or deterministic phase derived from the input.
2. Gate Processing: The encoded phasors travel through a user‑specified sequence of gates. Each gate applies a matrix operation that either rotates, mixes, or non‑linearly transforms the phasor vector while preserving the overall $L_2$ norm.
3. Decoding & Decision: After the final gate, the complex vector is projected back to the real domain (e.g., by taking the angle or magnitude) and fed into a lightweight classifier or regression head.

Component Interaction

The library’s core objects—PhasorTensor, Gate, and Circuit—communicate through NumPy‑compatible APIs. A Circuit holds an ordered list of Gate instances; each Gate implements a forward() method that accepts a PhasorTensor and returns a transformed tensor. Because all operations are expressed as matrix multiplications on $\mathbb{C}^N$, the entire pipeline can be simulated with standard linear‑algebra libraries, eliminating the need for quantum simulators.

What Sets This Apart

• Deterministic unitary evolution: Unlike stochastic quantum simulators, PhasorFlow guarantees repeatable results on any CPU.
• Parameter efficiency: VPCs often achieve comparable accuracy to deep CNNs or Transformers with a fraction of the trainable parameters.
• Gradient‑friendly geometry: The continuous phase space provides smooth gradients, enabling deeper circuits without the exploding/vanishing problem typical of conventional activations.

Evaluation & Results

The authors benchmarked PhasorFlow across five distinct domains to test both expressiveness and efficiency.

Spatial Classification

On a standard image classification task (e.g., MNIST‑like digits), a three‑layer VPC with 12 k parameters matched a baseline CNN that used 150 k parameters, achieving 98.2% accuracy versus 98.5% for the CNN.

Time‑Series Prediction

For a synthetic chaotic series, the Phasor Transformer’s DFT token‑mixing layer captured long‑range dependencies with only 0.8 M FLOPs, outperforming a vanilla Transformer by 1.3% in mean absolute error while using half the compute.

Financial Volatility Modeling

When forecasting intraday volatility spikes, a shallow VPC reduced prediction lag by 30% compared to an LSTM of comparable size, demonstrating the advantage of phase‑based temporal encoding.

Neuromorphic Spike‑Pattern Tasks

Using spiking‑neuron datasets, the non‑linear neuromorphic gates in PhasorFlow reproduced spike‑timing patterns with 92% fidelity, rivaling dedicated neuromorphic hardware simulators.

Motor‑Imagery EEG Classification

On a public EEG motor‑imagery benchmark, a VPC with 4 k trainable phases achieved 81% accuracy—on par with state‑of‑the‑art deep learning baselines—while using less than 5% of their parameter budget.

Across all experiments, the authors note two consistent observations:

• Depth improves performance up to a “parity ceiling” for VPCs; beyond that, additional layers yield diminishing returns.
• The Phasor Transformer benefits from moderate depth (3‑5 layers) before saturating, indicating a sweet spot for DFT‑based mixing.

Why This Matters for AI Systems and Agents

For engineers building AI agents that must run on constrained hardware—edge devices, IoT gateways, or low‑power servers—PhasorFlow offers a deterministic, low‑memory alternative to heavyweight Transformers. Its unitary gates guarantee numerical stability, which is crucial for long‑running autonomous agents that cannot afford drift or overflow errors.

Moreover, the phase‑centric representation aligns naturally with signal‑processing pipelines, making it easier to fuse sensor data (audio, RF, EEG) directly into the model without costly preprocessing. This can accelerate development cycles for domains such as predictive maintenance, real‑time finance, and neuromorphic robotics.

Enterprises looking to embed AI into existing workflows can leverage PhasorFlow within the Enterprise AI platform by UBOS to orchestrate lightweight inference services that scale horizontally without GPU dependence.

What Comes Next

While PhasorFlow demonstrates promising efficiency, several limitations remain:

• Expressivity ceiling: The parity ceiling observed in VPCs suggests that certain non‑linear decision boundaries may be unreachable without hybridizing with conventional layers.
• Hardware acceleration: Current implementations rely on CPU‑based linear algebra; dedicated SIMD or FPGA kernels could unlock orders‑of‑magnitude speedups.
• Tooling ecosystem: Integration with popular ML pipelines (e.g., PyTorch Lightning, TensorFlow) is still nascent.

Future research directions include:

1. Designing adaptive gate schedules that dynamically select unitary versus non‑linear operations based on data complexity.
2. Exploring mixed‑precision phasor arithmetic to further reduce memory bandwidth.
3. Combining PhasorFlow with probabilistic programming to model uncertainty on the unit circle.

Potential applications span from ultra‑low‑latency edge inference in autonomous drones to privacy‑preserving federated learning where the deterministic nature of phasor updates simplifies auditability.

Developers eager to experiment can start by cloning the repository, installing via pip install phasorflow, and running the provided notebooks. For a guided walkthrough, see the PhasorFlow GitHub page.

Businesses interested in integrating PhasorFlow into broader AI workflows may also explore the Chroma DB integration for vector storage, or the ChatGPT and Telegram integration to expose phasor‑based agents via messaging platforms.

References

PhasorFlow paper

Andrii Bidochko

CTO UBOS

Andrii Bidochko is an AI entrepreneur and researcher focused on AI agents, reinforcement learning, and autonomous systems. He writes about the technologies shaping the future of machine intelligence, from frontier models and agent architectures to real-world AI applications.